Optimal buffer management scheme with dynamic queue length thresholds for ATM switches
US6424622B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1999 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Feb 12, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5682
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A buffer management scheme for an ATM switch where the static and dynamic thresholds are applied appropriately at different levels to ensure efficient and fair usage of buffer memory. A novel dynamic threshold mechanism which, while ensuring fair sharing of memory, maximizes the overall memory utilization. An ATM switch using a dynamic queue threshold scheme, said ATM switch comprising K output port queues and a buffer of B cells sharing said K output port queues, wherein a common threshold is dynamically set for the K output port queues, the common threshold being changed to a new value from an old value when a new cell arrives at any of said K output queues, said new value being a maximum of a length of said any of said K output queues plus one and said old value when total queue length is less than a preset value times B and, said new value being a maximum of a said old value minus one and a statically set minimum buffer threshold when total queue length is greater than or equal to a preset value times B, wherein said preset value is greater than or equal to 0.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.