Information processing system, bus arbiter, and bus controlling method
US6425037B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1999 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Sep 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/364
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a means for preventing execution of a transaction such as main storage access from obstruction by bus competition with low-speed IO access and improving the bus occupation efficiency.The present invention includes a first bus, a second bus, a plurality of modules connected to both buses, a bus conversion means for performing protocol conversion of information between both buses, a bus arbiter for arbitrating a bus occupation right request of a bus master, and a storage means for storing access data up to a predetermined amount when the access destination is a predetermined module. Each bus master outputs access destination information and when the bus arbiter judges that one of the bus masters issues a bus occupation right request when it performs an access operation, the bus arbiter refers to the access destination information and the data storage status of the storage means and decides whether or not to give a bus occupation right to the bus master.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.