Patent · US Expired

Thin film resistor fabrication method

US6426268B1 · kind B1 · utility

31Cited by
10References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 7, 2001
Grant dateJul 30, 2002
Priority date
Expiry dateSep 7, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/85

Abstract

A thin film resistor fabrication method requires that an IC's active devices be fabricated on a substrate, and a dielectric layer be deposited over the devices to protect them from subsequent process steps. A layer of thin film material is deposited next, followed by a barrier layer and a first layer of metal. These three layers are patterned and etched to form isolated material stacks wherever a TFR is to be located, and a first level of metal interconnections. The first metal layer is removed from the TFR stacks, and the barrier layer is patterned and etched to provide respective openings which define the active areas of each TFR. In a preferred embodiment, a dielectric layer is deposited after the first metal layer is removed, to protect the interconnect metal from corrosion and as an adhesion layer for the patterning of the openings which define resistor length. Once the TFRs are completed, a dielectric layer is preferably deposited, vias to the first layer of metal are patterned and etched, and a second metal layer is deposited, patterned and etched to provide a second layer of metal interconnections.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.