Analog/digital feedback circuitry for minimizing DC offset variations in an analog signal
US6426663B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 1996 |
| Grant date | Jul 30, 2002 |
| Priority date | — |
| Expiry date | Mar 4, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01P15/08
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An analog signal gain circuit includes an input receiving an analog input signal defined by an ac signal component due to a driving force and a dc offset component independent of the driving force and an output providing an analog output signal defined by an amplified representation of the analog input signal and a dc offset component corresponding to a reference signal. A digital/analog feedback circuit includes a comparator having the reference signal as a switching threshold connected to an up/down counter having a number of digital outputs. The outputs of the up/down counter are connected to a D/A converter which converts the digital count to an analog feedback signal. The feedback signal is provided to the input of the analog signal gain circuit to minimize variations in the dc offset signal component of the analog output signal by compensating for the dc offset signal component of the analog input signal. The up/down counter is clocked at a slow rate to thereby provide a long time constant for minimizing the dc offset signal component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.