Method of erasing a flash memory device
US6426897B1 · kind B1 · utility
4Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2000 |
| Grant date | Jul 30, 2002 |
| Priority date | — |
| Expiry date | Nov 27, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of erasing a flash memory device performs erase operation by hot carrier injection method, by applying a ground potential to a source and applying the bias from a high voltage to a low voltage step by step, with a voltage of 5V being applied to a drain, wherein the bias of a floating gate in the flash memory device keeps 1.8 through 2V. being hot carrier injection condition and wherein the gate bias adjusts the bias applied according to the coupling ratio. Thus, it can reduce the erase time and allows the erase on a byte basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.