Method for forming interconnects on semiconductor substrates and structures formed

US6429523B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Panayotis Andricacos · Ossining, US
• Cyril Cabral, Jr. · Ossining, US
• John M. Cotte · New Fairfield, US
• Lynne M. Gignac · Beacon, US
• Wilma Jean Horkans · Ossining, US
• Kenneth P. Rodbell · Sandy Hook, US

Key dates

• Filing date: Jan 4, 2001
• Grant date: Aug 6, 2002
• Expiry date: Jan 4, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming metal interconnect in a semiconductor structure and the structure formed are disclosed. In the method, a seed layer of a first metal is first deposited into an interconnect opening wherein the seed layer has an average grain size of at least 0.0005 &mgr;m. The semiconductor structure is then annealed at a temperature sufficient to grow the average grain size in the seed layer to at least the film thickness. A filler layer of a second metal is then deposited to fill the interconnect opening overlaying the seed layer such that the filler layer has an average grain size of larger than 0.0005 &mgr;m and comparable to the annealed seed layer.