Low-power CMOS digital voltage level shifter
US6429683B1 · kind B1 · utility
17Cited by
6References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2000 |
| Grant date | Aug 6, 2002 |
| Priority date | — |
| Expiry date | Mar 21, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method of shifting a low-voltage-swing digital signal to a signal of the same polarity with a relatively higher voltage swing are described which eliminate static current consumption by way of a feedback circuit and a pull-up device. By the use of embodiments according to the invention, little power is consumed, and hot electron injection as a mechanism for FET degradation is of little concern. Additionally, no specialized reference voltage is necessary, and precise layout of the circuit is not critical to proper circuit performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.