Receiving circuit
US6429717B1 · kind B1 · utility
1Cited by
3References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 19, 2001 |
| Grant date | Aug 6, 2002 |
| Priority date | — |
| Expiry date | Sep 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/082
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiving circuit for receiving a signal transmitted to a signal transmission path, the receiving circuit comprising: a signal potential detection means for detecting signal potential of the received signal, a signal logic value discrimination means for discriminating a logic value of the received signal, and a reference signal generation means for generating a reference signal for the signal logic value discrimination means, based on a signal potential detected by the signal potential detection means and a discrimination result of the signal logic value discrimination means.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.