Semiconductor device and a method of manufacturing the same
US6433412B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2001 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Mar 8, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A central portion of a main face of a package substrate 2 is mounted with a memory chip 1 using face down bonding by a flip chip bonding system. Further, a plurality of chip condensers 7 are mounted at vicinities of the memory chip 1. A clearance between a main face (lower face) of the memory chip 1 and a main face of the package substrate 2 is filled with underfill resin (seal resin) 10 constituting a seal member for achieving protection of connecting portions and for relaxation of thermal stress. An outer edge of the underfill resin 10 is extended to an outer side of the memory chip 1 and covers entire faces of the chip condensers 7 mounted at vicinities of the memory chip 1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.