Method of system circuit design and circuitry for high speed data communication
US6433595B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2001 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Sep 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/00006
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of designing a system of electronic circuit is presented. With this method the circuit parameters of the components of the individual functional building blocks of the system are systematically adjusted to minimize the deteriorating effect resulting from system-level interactions among these functional building blocks. In one embodiment, the method is applied to a CMOS IC that is a Divide-by-16 divider where the functional building blocks are four Dividing by-2 dividers. The resulting improvement of output signal ripple from each devided stage is graphically presented. In another embodyment, the method is applied to another CMOS IC that is a Bang Bang Phase Detector where the functional building blocks are three Master Slave D-Type Flip Flops. The resulting improvement of output signal ripple is also graphically presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.