Offset error compensation of input signals in analog-to-digital converter
US6433712B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2001 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Jul 25, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter receiving an analog input signal (VIN) including an offset component, and includes a switched capacitor input circuit (101) configured to sample the analog input signal (VIN) to produce and store a signal representative of the sampled input signal between a first conductor (17) and a second conductor (27). A conversion circuit (1) is coupled to the first conductor (27) and the switched capacitor input circuit (101) to produce a digital output signal (DATA OUT). An offset correction circuit (4) includes an output coupled to the second conductor (27) and an input receiving a digital offset correction signal (DATA IN), the offset correction circuit (4) including a switched capacitor correction circuit (4A) operative in response to the offset correction control signal (DATA IN) to transfer charge to/from the second conductor (27). The conversion circuit (1) operates in response to adjustment by the offset correction circuit (4) of a signal conducted by the second conductor (27) to produce the digital output signal (DATA OUT) compensated for the offset component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.