Analog-to-digital conversion with reduced error
US6433723B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 30, 1999 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Jul 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter for generating samples at a first sample rate includes a noise generator, a summing circuit, a conversion circuit, and a low pass filter. The noise generator is configured to generate a noise signal having a signal bandwidth, the signal bandwidth including a high frequency that exceeds the first sample rate. The summing circuit is configured to sum the noise signal with an input signal in order to generate a composite signal. The conversion circuit is configured to convert the composite signal to a first digital signal, the conversion circuit using a sampling rate that exceeds the first sample rate. The low pass filter is operable to filter the first digital signal and to generate a second digital signal having the first sample rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.