Method and apparatus for selectively disabling logic in a semiconductor device
US6434077B1 · kind B1 · utility
7Cited by
3References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 13, 2001 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Mar 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including an embedded memory and an Application Specific Integrated Circuit logic which is configured before the semiconductor device is packaged is presented. The Application Specific Integrated Circuit logic implements a plurality of functions. A fusible link in the embedded memory connected to one of the plurality of functions enables the function in the Application Specific Integrated Circuit. The function can be permanently disabled in the Application Specific Integrated Circuit by blowing the fusible link in the embedded memory while testing the embedded memory or after testing the embedded memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.