UART with direct memory access buffering of data and method therefor
US6434161B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1998 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Feb 25, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for transferring data between a host system and a communication network via a communication module wherein the communication module presents a UART-like interface to the host system. The communication module is comprised of an emulated UART module, a digital signal processor (DSP), and a DSP memory. The emulated UART provides a compatible UART-like front end for interlacing directly with a host system and additionally performs direct memory access-like (DMA) functions enabling the direct transfer of transmit data between the host system and DSP memory that is directly accessible by the DSP for modulation and/or other processing such as data compression. The emulated UART module additionally provides performance features such as adjustable buffering quantity thresholds for triggering interrupts to either the host system or DSP, and pacing features that provide the host system with the appearance and performance of a serialized UART.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.