Synchronization burst processor for a processing satellite
US6434361B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 1999 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Sep 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/2125
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A synchronization burst processor (56) used in a processing satellite (12) in a satellite based communications system (10) is provided with a sync burst memory (72), a first double correlator (74), a second double correlator (76) and a modulus module (78). The sync burst memory (72) stores at least one sync burst (52) transmitted from a terrestrial terminal (14) to the processing satellite (12) where the sync burst (52) is formed from a quadrature pair sample set {p, q}. The first double correlator (74) performs an early correlation and a late correlation of the p samples relative to a sync burst slot (50) to generate an early correlation Pe and a late correlation Pl. The second double correlator (76) performs an early correlation and a late correlation of the q samples relative to the sync burst slot (50) to generate an early correlation Qe and a late correlation Ql. The modulus module (78) determines an early modulus Re and a late modulus Rl from the early correlations Pe and Qe and from the late correlations Pl and Ql. The early modulus Re and the late modulus Rl are used to determine if the sync burst (52) is present in the sync burst slot (50) and if the sync burst (52) is ear…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.