Methods of forming semiconductor structure

US6436793B1 · kind B1 · utility

Assignee

• Xerox Corporation · US

Inventors

• Gary A. Kneezel · Webster, US
• Daniel E. Kuhman · Fairport, US
• Brian T. Ormond · Webster, US
• Ackerman C. John · Rochester, US
• Almon P. Fisher · Rochester, US
• Allan F. Camp · Brockport, US
• Lawrence H. Herko · Walworth, US

Key dates

• Filing date: Dec 28, 2000
• Grant date: Aug 20, 2002
• Expiry date: Dec 28, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/78
• WIPO field: Textile and paper machines
• WIPO sector: Mechanical engineering

Abstract

A method of forming a semiconductor structure from a first wafer and a second wafer. A pit or groove is formed in a lower surface of the first wafer. The lower surface of the first wafer is bonded to an upper surface of the second wafer. A groove is then formed on an upper surface of the first wafer, such that an opening is formed in the first wafer that exposes at least one alignment reference target on the upper surface of the second wafer. The bonded first wafer and second wafer is then diced using the exposed at least one alignment reference target to form a semiconductor structure.