Integrated circuit device providing isolation between adjacent regions
US6437379B1 · kind B1 · utility
Inventors
Key dates
| Filing date | May 22, 2001 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | May 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.