Semiconductor integrated circuit having an improved grounding structure
US6437426B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 27, 2000 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Jan 27, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor integrated circuit, a ground plane conductor 3 is formed in a substrate 9 to oppose to a conducting line 2 formed on the substrate, so as to form a microstrip line. A decoupling capacitor 1 is provided on the substrate 9 and is electrically connected between the conducting line 2 and the ground plane conductor 3 so as to bypass a high frequency current component flowing through the conducting line to the ground plane conductor. Thus, the impedance of the conducting line 2 is stabilized, and a path of a feedback current of a high frequency current component flowing through the conducting line 2 is ensured by the ground plane conductor 3, so that a current loop is minimized, resulting in minimized electromagnetic noises radiated from the current loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.