Method of anomalous offset detection and a corresponding circuit
US6437606B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2000 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Dec 14, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/52
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of assessing the offset on the output nodes of an amplifying channel includes generating a logic signal for signaling the existence of an offset having a level exceeding a window of permitted levels symmetric about the zero level. The window is defined by a negative limit value and by a positive limit value. The method includes establishing an interval or phase of detection by applying to an input of a detection circuit a timing pulse with a certain frequency, sensing the rising edge of the timing pulse and setting a bistable circuit, and comparing the signal on the output nodes of the amplifiers channel with the window of permitted values. The bistable circuit is reset upon the occurrence, after the initial setting, of an output signal amplitude within the window of permitted values. Failure of the bistable circuit to reset before the end of the detection phase signals an excessive offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.