Slew rate boost circuitry and method
US6437645B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2001 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Mar 8, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04106
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential input circuit (1) includes circuitry for generating slew boost currents to be supplied to an output stage of an operational amplifier. The differential input circuit (1) includes a differential current steering circuit including a first transistor (M2) having a gate coupled to receive a first input signal (Vin−), a second transistor (M3) having a gate coupled to receive a second input signal (Vin+), and a constant current source (20) coupled to sources of the first and second transistors, and providing first (4 or 6) and second (5 or 7) outputs of the differential input circuit coupled to the first (M2) and second (M3), respectively. A first slew current circuit is operated in response to the first input signal (Vin−) to produce a first slew boost current which is introduced into a current summing conductor (9) coupled to the sources of the first (M2) and second (M3) transistors and the constant current source (20). A second slew current circuit is operated in response to the second input signal (Vin+) to produce a second slew boost current which is introduced into the current summing conductor (9), wherein the first and second slew boost currents boostin…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.