Image processing apparatus having plural image processors and apparatus which merges data to be input and output to the image processors
US6437825B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 1997 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Dec 3, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/401
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image signal processing apparatus to realize signal processing system and apparatus constitution, where an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor is obtained in circuit constitution of small scale with high picture quality. In order to solve the problems, data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is made b+f+j≦8 per one pixel. Or error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is made b+f+j′≦8, data width per one pixel being made j′=j/N. Image signal processing is realized in this constitution, thereby data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying accuracy of signal processing sufficiently and having high picture quality can be obtained. For example, when a circuit is constituted by LSI, the memory section can be easily mounted on the same LSI. A memory required in the image signal processing can be made 8 bits per one pixel and a cheap memory constitution can be utilized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.