Circuit arrangement
US6438001B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 17, 2001 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Dec 17, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A description is given of a circuit arrangement for converting an input AC voltage into a rectified output voltage with a rectifier circuit (G) and a charging capacitor (CHV) downstream in the circuit arrangement. The circuit arrangement additionally includes a stabilizing capacitor (C1, C2) which is connected in parallel to the charging capacitor (CHV) so that the stabilizing capacitor (C1, C2) is charged to its maximum when the charging capacitor (CHV) is charged, until the value of the voltage present on the stabilizing capacitor (C1, C2) corresponds to a fraction of a maximum peak voltage present on the charging capacitor (CHV). This stabilizing capacitor is discharged, in essence, only when the voltage present on the charging capacitor (CHV) drops below the value of the voltage present on the stabilizing capacitor (C1, C2).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.