Ferroelectric memory device having an internal supply voltage, which is lower than the external supply voltage, supplied to the memory cells
US6438020B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2000 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Nov 22, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided a highly reliable non-volatile ferroelectric memory device in which the permitted number of read/write operation cycles is increased. The device comprises a step-down power supply circuit which generates a supply voltage VINT which is lower than a supply voltage VDD fed from the outside but not less than a coercive voltage of the ferroelectrics for the purpose of improving the resistance to fatigue of and imprinting to the ferroelectrics. Since the characteristics of the ferroelectrics deteriorate more due to fatigue and imprinting as the voltage applied to the ferroelectrics increases, a supply voltage for sense amplifiers and voltage supply circuits are selected to be VINT so that VINT is applied to the ferroelectric capacitors, while a supply voltage for other peripheral circuits is selected to be VDD. With this structure, the reliability of the device with respect to its read/write operations can significantly be improved as compared to the conventional ferroelectric memory devices by minimizing the effect that the signal voltage is reduced and by increasing the permitted number of operation cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.