Equipment evaluation and design
US6438439B1 · kind B1 · utility
2Cited by
9References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 1998 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Sep 18, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor processing tool evaluation and design method which replaces tool specifications with a requirements region plus associated evaluation functions for iterative feedback tool design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.