Technique using FIFO memory for booting a programmable microprocessor from a host computer
US6438683B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 28, 1992 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Jul 28, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system, which includes a host computer and at least one programmable slave processor, boots the slave processor simply and inexpensively by using a first in first out (FIFO) memory connected between the host computer and the slave processor. Specifically, the computer system includes a host computer, a programmable microprocessor (the slave processor) controlled by the host computer, a FIFO memory connected between the host computer and the microprocessor, and means for providing a boot program and/or boot data from the host computer to the microprocessor through the FIFO memory. When the boot program functions, operating instructions for the microprocessor are read into the microprocessor's own random access memory (RAM).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.