Semiconductor device of stacked chips
US6441495B1 · kind B1 · utility
19Cited by
10References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1998 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Oct 5, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a plurality of semiconductor chips stacked in the direction of thickness. Each of the semiconductor chips includes an upper or lower surface formed with electrodes. The semiconductor device further comprises a plurality of terminal portions disposed beside these semiconductor chips, and a plural pieces of wire for electrical connection from the electrodes to respective terminal portions. Each of the terminal portions is at an elevation lower than the highest electrodes, and higher than the lowest electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.