Low power voltage regulator with improved on-chip noise isolation
US6441594B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2001 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Apr 27, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A voltage regulator 100, 130 for isolating radio frequency circuits from on chip digital circuit originated noise and an integrated circuit chip including the voltage regulator. The voltage regulator 100, 130 includes regulator device (a PFET) 106 driven by a sense amplifier 110 to derive a regulator voltage 108 from a supply voltage 102. Another sense amplifier 114 senses changes in output load and adjusts current flow through a current shunt 120, 122 so that the current shunt 120, 122 shunts excess load current. The sense amplifier 110 driving the voltage regulator device 106 senses current flow through the current shunt 120, 122 and adjusts the current supplied by the regulator device 106 to reduce excess current. The current shunt 120, 122 is a series connected PFET 120 and NFET diode 122, with the gate of the PFET 120 driven to control current flow. Each of the sense amplifiers 110, 114 includes a pair of PFETs 132, 134 140, 142 and a pair of NFETs 136, 138 144, 146, the drain of each PFET of the pair is tied to a corresponding drain of one of the pair of NFETs. A voltage divider 116, 118 connected between the regulator voltage 108 and ground provides a sense voltage to the ou…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.