Multi-bit &Dgr;&Sgr; modulator having linear output
US6441759B1 · kind B1 · utility
2Cited by
12References
14Claims
0Family size
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Key dates
| Filing date | Aug 30, 2000 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Aug 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/436
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method of improving linearity of a multi bit &Dgr;&Sgr; modulator in which the output of a multi-bit quantizer of a &Dgr;&Sgr; modulator is connected in a feedback loop to a converter where output is a higher frequency single bit data stream which is supplied to a 1-bit digital to analog converter whose output is fed back to the quantizer to provide linearity of the output of the &Dgr;&Sgr; modulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.