Lateral semiconductor device for withstanding high reverse biasing voltages
US6445019B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2001 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | Mar 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/151
Abstract
A semiconductor body (11) has first and second opposed major surfaces (11a and 11b). First and second main regions (13 and 14) meet the second major surface (11b) and a voltage-sustaining zone is provided between the first and second regions (13 and 14). The voltage-sustaining zone has a semiconductor region (11) of one conductivity type forming a rectifying junction (J) with a region (15) of the device such that, when the rectifying junction is reverse-biased in one mode of operation, a depletion region extends in the semiconductor region of the voltage-sustaining zone. A number of conductive regions (22) are isolated from and extend through the semiconductor region (11) in a direction transverse to the first and second major surfaces (11a and 11b) so as to be spaced apart in a direction between first and second main regions. A voltage regulator (20; 20′; 20a and 20b) is provided for setting the voltage at each conductive regions (22) so as to control the voltage distribution, and thus the electrical field profile, in the voltage-sustaining zone when the rectifying junction is reverse-biased in said one mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.