Semiconductor memory device with a refresh function
US6445637B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2001 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | Mar 23, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/408
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having a refresh function to restore data stored in a memory cell, comprises a delay switching block for delaying a signal for deactivating a word line in a self-refresh operation as compared with the signal in a CBR refresh operation. The delay switching block comprises: a first signal path for allowing the signal for deactivating the word line to pass; a second signal path for delaying the signal for deactivating the word line by a predetermined time; and a path selecting block for selecting the first signal path in the CBR refresh operation, and for selecting the second signal path in the self-refresh operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.