Data structure for emulating virtual memory working spaces
US6446094B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2000 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | Dec 24, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99957
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an emulation of a multiprocessor Target computer system on a Host computer system, Host virtual memory addresses are mapped and utilized as Target virtual memory addresses. Target virtual memory control tables are setup accordingly. Virtual-to-real address translation of a Target system effective address to a Host system virtual addresses is performed by identifying a working space for the effective address, selecting a working space base address data structure entry utilizing the corresponding working space number, determining a working space base address from that selected working space base address data structure entry, and then performing a linear translation multiplying the effective address by a constant and adding it to the working space base address to generate the host system virtual address. A corresponding working space limit entry can be utilized to bounds check the addresses generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.