Distribution of modem error correction and compression processing
US6446232B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2000 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | May 3, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/324
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for distributing the data error correction and compression processing load between a modem (DCE) and a host data terminal equipment (DTE) enables modem implementation with minimal cost, power dissipation, and size. The DTE has a CPU and an associated memory. The memory contains a data transmission program for execution by the CPU to produce output data for transmitting, and at least a data compression algorithm and a data error checking algorithm for execution by the CPU under control of the data transmission program to asynchronously deliver data according to the data transmission program to a modem for synchronous transmission. The modem included in the DCE asynchronously received the data from the DTE and synchronously transmits it as output data. Due to the distribution of the data processing algorithms into the memory of the DTE, the DCE can be operated simultaneously in communication and control modes. Moreover, the modem can be controlled during data transmission or reception in response to a <DLE> code in combination with a predetermined control code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.