Programmable chalcogenide fuse within a semiconductor device
US6448576B1 · kind B1 · utility
68Cited by
10References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2001 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Aug 30, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.