Adaptive body biasing circuit and method
US6448840B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 1999 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Nov 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0018
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An adaptive body bias circuit forward or reverse biases bodies of transistors within a compensated circuit as a result of measured parameters of an integrated circuit. The adaptive body bias circuit includes a matched circuit that includes a replica of a signal path within the compensated circuit. The phase of a clock signal at the input to the matched circuit is compared to a phase of a delayed clock signal at the output of the matched circuit. When the delay through the matched circuit varies about one period of the clock signal, a non-zero error value is produced. A bias voltage is generated as a function of the error value, and the bias voltage is applied to the compensated circuit as well as the matched circuit. Integrated circuits can include many adaptive body bias circuits. Bias values can be stored in memories for later use, and bias values within memories can be updated periodically to compensate the circuit over time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.