Display column driver with chip-to-chip settling time matching means
US6448948B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 2000 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Jan 25, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A device for and method of eliminating undesirable vertical segments of uneven brightness in flat panel field emission display (FED) screens. Within the FED screen, a matrix of rows and columns is provided and emitters are situated within each row-column intersection. Amplitude modulated signals are provided to the columns by column drivers and discrepancies in settling times among the column drivers cause vertical segments of uneven brightness on the display screen. The present invention normalizes settling time of the column amplifier that can be variant due to differences in semiconductor processing and manufacturing. The present invention includes specialized circuitry coupled to the column drivers for sensing an output of the column driver and determining a difference between the output and a threshold at a particular time before the output has completely settled to a target voltage. In response to the difference, amplifier bias voltage of output amplifiers within each column driver are altered in order to deviate the settling time of the column driver towards a target settling time. As a result, the settling times of all the column drivers in the FED screen are matched. Conse…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.