Safety timer to protect a display from fault conditions
US6448962B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 1999 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | May 14, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for protecting a display from fault conditions. An oscillator independent of a display clock of a display to be protected is formed on a substrate with the display. The oscillator generates a periodic signal which is used to define a period during which a register collects indicators of normal system operation. Combinational logic is used to determine if the set of indicators collected matches the set of indicators expected during the time period. If the set matches, operation is deemed normal and no action is taken. If an indicator is missing, the combinational logic generates a signal that causes the display to be driven into a safe state until such time as all indicators are again collected within the defined time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.