Method and apparatus for processing control using a multiple redundant processor control system
US6449732B1 · kind B1 · utility
49Cited by
7References
48Claims
0Family size
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Key dates
| Filing date | Dec 18, 1999 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Dec 18, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2051
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller for executing an application program to process control information related to control elements includes one or more main processors that each run the application program; a time synchronization system that synchronizes the time clocks of the main processors; and a voting system that exchanges information between the main processors and compares the information received from the other main processors. In addition, the controller includes one or more rendezvous signals sent to and received by the main processors as well as a mechanism for updating the time clocks based on a clocking midpoint of all processor signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.