Maintaining correspondence between text and schematic representations of circuit elements in circuit synthesis
US6449762B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 7, 1999 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Oct 7, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus that maintains the correspondence between a text representation of a circuit element and the corresponding schematic representation of the element after optimization of the circuit containing the element. In one example of a method of the invention, a circuit containing element is described in text representation. A first tag is assigned to the text representation. The text representation is synthesized to produce a first schematic representation of the circuit element. A second tag corresponding to the first tag is assigned to the first schematic representation of the circuit element. The circuit containing the circuit element is optimized to produce a second schematic representation of the circuit element. A third tag corresponding to the first tag is assigned to the second schematic representation. Other methods and apparatuses are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.