Photolithography system and a method for fabricating a thin film transistor array substrate using the same
US6451635B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2001 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Mar 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136236
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating a thin film transistor array substrate for a liquid crystal display includes the step of forming a gate line assembly with gate lines, gate electrodes and gate pads. After laying a plurality of layers on the substrate, a photoresist film is deposited onto the layers. The photoresist film is first exposed to light at a first light exposing unit, and secondly exposed to light at a second light exposing unit such that the photoresist film has three portions of different thickness. The photoresist pattern, and some of the underlying layers are etched to form a data line assembly, a semiconductor pattern, and an ohmic contact pattern. The data line assembly includes data lines, source and drain electrodes, and data pads. The remaining photoresist film is removed, and a protective layer is formed on the substrate. The protective layer is etched together with the gate insulating layer to form first to third contact holes exposing the drain electrode, the gate pad and the data pad, respectively. Pixel electrodes, subsidiary gate and data pads are then formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.