Delta sigma converter incorporating a multiplier
US6452524B1 · kind B1 · utility
22Cited by
8References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2001 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Feb 8, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3015
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delta-sigma converter including a multiplier. The delta-sigma converter includes a feed-forward path and a feedback path providing a feedback signal. The converter output signal is multiplied in the feedback path by a mapping function, and the multiplied signal is mapped to a digital feedback signal having the same number of bits as the input signal. There is also provided a digital-to-analog converter including a delta-sigma converter consistent with the invention, and a method of multiplying a digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.