Slot array antenna with reduced edge diffraction
US6452560B2 · kind B2 · utility
32Cited by
22References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 8, 2000 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Dec 8, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q13/20
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A slot-array antenna includes a nonconductive substantially planar substrate and a transmission line disposed on a rear substrate surface where one end of the transmission line is connected to an amplifier, a connector, or an impedance load. A conductive layer on the front substrate surface includes a plurality of slotted openings arrayed about an antenna axis. A surface-wave suppression region encloses the array of slotted openings and a plurality of peripheral openings are disposed between the surface-wave suppression region and the peripheral edge of the antenna.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.