Raster scan conversion system for interpolating interlaced signals
US6452639B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 1999 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Mar 4, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/0142
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to an interlaced to progressive conversion method and system by use of an interpolation algorithm (IPC algorithm) which is scaleable with several levels or modes with an increasing computational complexity depending on increasing availability of resources, i.e. computation power, available memory and available memory bandwidth. An IPC mode control can be implemented as a decision table. Peferably, at least five levels of the algorithm can be scaled beginning with line repetition (lowest level), linear interpolation (lower level), median inter-field computation with a three-tap or a five-tap median operator (medium level) and a combination of a linear interpolator and a median interpolator, eventually in combination with edge detection (higher levels of the scaleable algorithm).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.