Massively paralleled sequential test algorithm
US6452961B1 · kind B1 · utility
15Cited by
7References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 12, 2000 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Sep 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/70707
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus and method allow receivers to quickly acquire a pseudorandom noise signal. A receiver advantageously detects frequency shifts using a compact parallel process hardware implementation of a Discrete Fourier Transform (DFT). The method applies a sequential test algorithm to the detection of a correlation signal. The method allows the receiver to search a range of frequency-time space relatively quickly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.