Method for fabricating integrated circuits
US6453447B1 · kind B1 · utility
34Cited by
21References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2000 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Aug 16, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Functional and geometrical sub-components of logic circuits are defined and used in the design of integrated circuits to facilitate the transformation of an integrated circuit design for fabrication at foundries with different design rules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.