Method and circuit for detection of primary switches status in isolated DC/DC converters
US6456106B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 7, 2000 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Jun 7, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method and circuit for detecting primary switch (12) status in isolated DC/DC converters by observing the falling speed of the voltage level at the sensing point (node Z) is disclosed. It is noted that high impedance oscillation has a relatively slow falling or rising time when compared to a valid signal. By observing the falling or rising time of a given signal during the appropriate time period, a determination can be made to differentiate a valid signal and an oscillating signal. More specifically, two reference voltages (A & B) are provided to compare against node Z voltage to generate a sense pulse. A reference pulse having a predefined duration is compared to the sense pulse. If the duration of the sense pulse is greater than the duration of the reference pulse, a latch is used to generate a low output signal. If the duration of the sense pulse is less than the duration of the reference pulse, a high output signal is generated. The latch is reset when node Z voltage rises above reference voltage B.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.