Patent · US Expired

Input buffer circuit for transforming pseudo differential signals into full differential signals

US6456122B1 · kind B1 · utility

4Cited by
4References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 6, 2001
Grant dateSep 24, 2002
Priority date
Expiry dateJul 6, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/018528
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An input buffer circuit for transforming pseudo differential input signals into full differential output signals wherein, the input buffer circuit includes a pull-up current source, two pull-down current sources, a differential input portion, and a positive feedback portion. The pull-up current source is formed of two PMOS transistors which are always in an “on” state, and provides an electric current. The two pull-down current sources are each formed of an NMOS transistor, which are always in an on state, and sink a pull-up electric current. The differential input portion is formed of two NMOS transistors, and receives an input signal and a reference signal, respectively. The positive feedback portion is formed of two NMOS transistors, and enlarges a voltage difference between two output terminals of the input circuit using positive feedback.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.