Enhanced slew rate in amplifier circuits
US6456161B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 11, 2001 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Jun 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45631
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier circuit comprising an input stage capable of receiving and amplifying an input signal, a gain stage electrically coupled to the input stage that is capable of further amplifying the input signal, and an output stage electrically coupled to the gain stage that is capable of charging a capacitance of the amplifier circuit and outputting the amplified input signal. The gain stage of the amplifier circuit comprises a pair of gain transistors with base terminals that are electrically coupled to the input stage, collector terminals that are electrically coupled to a path to ground, and emitter terminals that are electrically coupled to the output stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.