Voltage detecting circuit for semiconductor memory device
US6456555B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2000 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Mar 12, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4074
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A voltage detecting circuit includes first and second reference voltage generating circuits. The first reference voltage generating circuit provides a reference voltage during a normal operation mode. The second reference voltage generating circuit provides a reference voltage during a test mode. A comparison voltage generating circuit is also included and provides a comparison voltage during both modes in response to a boosted voltage. A differential amplifier circuit is further included in the voltage detecting circuit. The differential amplifier generates an amplified difference signal that is used to generate a voltage level detection signal. The voltage level detection signal controls a pumping operation for generating the boosted voltage level. A bypass circuit may also be provided to lower a detected boosted voltage level and allow operation at lower voltage levels. The voltage detecting circuit according to this invention is unaffected by process and temperature variations and allows precise and stable voltage detection in either operation mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.