Patent · US Expired

Time interval analyzer having parallel counters

US6456959B1 · kind B1 · utility

11Cited by
23References
26Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJul 14, 1999
Grant dateSep 24, 2002
Priority date
Expiry dateJul 14, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG04F10/00
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A time interval analyzer includes a trigger circuit that receives an input signal and that outputs a trigger signal at a triggering level upon occurrence of a first event. A first counter receives the input signal and, when it is activated, increments a count at each occurrence of an event. A second counter receives the input signal and, when it is activated, increments a count at each occurrence of an event. A control circuit receives the trigger signal from the trigger circuit and outputs a control signal to each of the first counter and the second counter that controls activation of the first counter and the second counter so that only one of the first counter and the second counter is activated at a time. The control circuit is configured so that, when the trigger signal goes to a triggering level from a non-triggering level and when one of the first counter and the second counter is activated and the other of the first counter and the second counter is deactivated, the control circuit deactivates the one of the first counter and the second counter and activates the other of the first counter and the second counter.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.