Break event generation during transitions between modes of operation in a computer system
US6457082B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1999 |
| Grant date | Sep 24, 2002 |
| Priority date | — |
| Expiry date | Mar 30, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A break event in a computer system that can operate in one of a plurality of modes, such as a high performance mode and a low power mode is initiated only be logic that that detects when the transition between modes is complete. In the high performance mode, the CPU clock is faster than in the low power mode. The CPU voltage may also be higher in the high performance mode than in the low speed mode. The low power mode may be desirable for a portable computer operating from battery power in order to conserve the battery's charge. The computer system preferably transitions its CPU to a “sleep” state during the mode switch and precludes devices not associated with the mode transition from “waking” the CPU and disturbing the completion of the mode switch. Accordingly, only logic that detects the end of the mode switch can break the CPU out of its sleep state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.